The process of mounting a semiconductor die to a substrate or package is generally known as die attach. Eutectic die attach, also referred to as eutectic bonding, which is commonly employed in hermetic integrated circuit (IC) packages, typically uses a eutectic alloy to attach the semiconductor die to a package cavity. A eutectic alloy is an alloy with the lowest melting point possible for the metals combined in the alloy. One of the most commonly used die attach alloys in semiconductor packaging is a gold-silicon (Au—Si) alloy.
During a conventional eutectic die attach process, a gold preform is placed on top of the package cavity while the package is being heated. When the die is mounted over the preform, silicon from the backside of the die diffuses into the gold preform, forming a gold-silicon alloy composition. As more silicon diffuses into the preform, the ratio of silicon to gold increases, until a eutectic ratio is achieved. The Au—Si alloy has about 97 percent gold and about 3 percent silicon and has a melting point of around 363 degrees Celsius. In order to achieve the eutectic melting point, the die attach temperature must be reasonably higher than this temperature. To optimize the die attachment, a “scrubbing” of the die into the eutectic alloy is typically performed. This scrubbing action helps ensure good wetting of the die and the package cavity for even distribution of the die attach alloy so as to achieve a substantially void-free bond.
In order to hold the die during the die attach process, a pickup tool, usually a die collet, is used. Four-sided collets are often referred to as pyramidal die collets, or “inverted pyramids,” and two-sided collets are often referred to as “channel” collets. In either case, the slanted sides of the collet contact the silicon die along the sawed perimeter edge of the die. The sawing process typically produces chip-out damage to the edges of the die, and when coupled with the scrubbing and/or normal force of the die attach process, additional cracking of the silicon die often occurs. For ultra-thin (e.g., about 50 microns or less) die applications, such as, but not limited to, radio frequency (RF) power devices, a yield loss resulting from one or more of these damage modes can be significant.
One known approach to minimize the potential for damaging the semiconductor die during die attach is to reduce an angle of the slanted sides of the collet. In making the sides of the collet a shallower angle, however, the die will not be captured as well, therefore causing the die to shift during the scrubbing process. The shifting of the die will undesirably affect the final placement accuracy of the die. For certain semiconductor devices, such as, for example, RF power devices, die placement accuracy is crucial for repeatable RF performance.
With regard to wafer sawing, one known technique for minimizing damage to the die resulting from the sawing process is to employ a scribe and cleave process. Scribe and cleave is a two-step process, however, and any improvements in die edge damage achieved from this alternative process are generally not sufficient to overcome the drop in throughput compared to sawing.
In U.S. Pat. No. 5,516,125 to McKenna, which is directed to an improved collet for vacuum pick-up of a semiconductor die, an embodiment is described which is suitable for use with a die having beveled perimeter edges. McKenna further describes one type of beveled edge die in which the die boundaries of an entire wafer are sawn with a partial v-shaped saw down to a specified depth, followed by a cleave process to separate the individual die. However, as previously stated, the wafer sawing process typically produces considerable chip-out damage to the edges of the die and is thus undesirable.
There exists a need, therefore, for an improved semiconductor device that does not suffer from one or more of the problems attributable to the use of conventional wafer sawing and/or die attachment methodologies.